profile-info - Sri Venkateswara College of Engineering

Profile

Name	Dr. M. Athappan
Designation	Associate Professor
Areas of Interest	VLSI, Digital System Design, Electronic Circuits, Microprocessor and Microcontroller, Computer Architechture, Network Security
Room No.	14-112
Intercom No.	91-44- 27152000, EXTN:223
Mobile
Email Id (Official)	athappan@svce.ac.in
Email Id (Personal)	athappanm@gmail.com

Qualification

Academic Experience

Courses Handled

EC22304 Electronic Circuits

EC6009 Advanced Computer Architecture

AP7102 Advanced Digital Logic System Design

Research & Consultancy

Funded Project:

Co-Principal Investigator for the project titled “Design and Development of Key exchange mechanism for high-security Applications” received Rs.13.32 Lakhs from ISRO under RESPOND scheme for the period of 2 years from 2017-2019.

International Journal:

Prassanna Ganesan, Sree Murari K, Syed Fardeen Althaf, M.Athappan (2023), “Detection of Malware Probing On FPGA” in the International Journal of Advances in Engineering and Management (IJAEM), vol.5, no.6, pp. 595-600.
M. Athappan M, Dr.KR.Santha (2022), ‘A Delay Efficient Hybrid Parallel Prefix Variable Latency CSKA based Multi-Operand Adder with Optimized 5:2 Compressor and Skip Logic’, in the International Journal of Electronics, vol.110, no.4, pp. 608-630.
M. Athappan M, Dr.KR.Santha (2020), ‘Area-Delay Efficient Fixed Stage Carry Skip Adder’, in the International Journal of Advanced Science and Technology, vol. 29, no. 7, pp. 3609-3617.
M. Athappan, K.Swetha, “Design and Analysis of Carry Select Adder Using Kogge Stone Adder” in the International Journal of Innovative Research in Computer and Communication Engineering, Vol.5, Special Issue 3, April 2017.
M.Athappan, C.T.Poomagal,”Wireless Optical Communication for Underwater Applications”, International Journal of Advanced Research in Electronics & Communication Engineering Vol.3, Issue 3, March 2014.
M. Athappan, G.Madhusudhanan,”VLSI based performance improvement in Digital Hearing aid using reconfigrable filter”, International Journal of Engineering Research & Technology,Vol.3, Issue 5, May 2014.

Conference / Workshop / FDP

International Conference:

Vimala R V and Athappan M, “Area and Power Efficient Common Boolean Logic Based Carry Select Adder using Optimized Carry Select Method” in the Second international Conference on Human Computer Interactions ICHCI-2016 held on 10th and 11th March 2016 at Saveetha School of Engineering, Chennai.
Presented a paper titled “Area- Delay Trade-off Optimization for Memory Based Computation” in Fourth International Conference on Electronics Computer Technology (ICECT 2012) held during 6th to 8th April 2012 in Kanyakumari,India.

Workshop Attended:

Guest Lectures Delivered:

Delivered a guest lecture on the topic “IIC – Developing Online Repository of POCs”, organized by the IIC, SMK Fomra Institute of Technology, Chennai, on 3rd March 2022.
Delivered a guest lecture on the topic “”Developing Online Repository of Proof of Concepts (POCs) Developed and Wayforward Plan” organized by the IIC, SVCE on 26th February 2022.
Delivered a guest lecture on the topic “Design Validation (Double Diamond Approach)” organized by the IIC, SVCE on 28th December 2020.
Delivered a guest lecture on the topic “Innovation Technology & Start-Up Ecosystem” organized by the IIC, SVCE on 9th July 2020.

Workshop Organized:

Organized one day “Exposure and Field Visit on Innovation and Entrepreneurship” at IITM Research Park, Taramani, Chennai on 13th March 2023.
Co-ordinator for the One day Workshop on “PCB Design and Fabrication” organized by the Department of Electronics and Communication Engineering, SVCE on 27th February 2019.
Co-ordinator for the “Two days Workshop on FPGA Based System Design for Image Processing Algorithms” organized by Research and Development Cell, Department of Electronics and Communication Engineering, SVCE on 1st & 2nd February 2017.
Co-ordinator for the “Two days Workshop on Analog Custom IC Design using Cadence EDA” organized by Research and Development Cell, Department of Electronics and Communication Engineering, SVCE on 19th & 20th August 2016.
Co-ordinator for the “Recent Trends in Embedded Systems” organized by Research and Development Cell, Department of Electronics and Communication Engineering, SVCE on 10th and 11th March 2016.

FDP Attended:

Participated in a six days AICTE sponsored online short term training Programme on “High Performance Intelligent Real Time Embedded System Design and Internet of Things to accelerate system in to autonomous System” organized by the Department of Electronics and Communication Engineering, SVCE on 1st September to 7th September 2020.
Participated in Two Weeks AICTE sponsored “Staff Development Programme” held during 28.04.2003 to 11.05.2003 at R.V.S College of Engineering and Technology, Dindigul.

Laboratory Handled

Training Attended

Additional Responsibilities

Achievements

faculty Profile