|Name||Mr. M. Athappan|
|Areas of Interest||Computer Architechture Electronic Circuits Digital Electronics Microprocessor and Microcontroller VLSI Network Security|
|Email Id (Official)||firstname.lastname@example.org|
|Email Id (Personal)||email@example.com|
Pursuing Ph.D at Anna University, Chennai.
Working as Assistant Professor in Sri Venkateswara College of Engineering from June 2010 onwards.
Worked as Lecturer in Sri Venkateswara College of Engineering from June 2005 to May2010.
Worked as Lecturer in G.K.M College of Engineering and Technology from July 2002 to May 2005.
EC6009 Advanced Computer Architecture
AP7102 Advanced Digital Logic System Design
EC6711 Embedded Lab
CS6201 Digital Principles and System Design.
CS6211 Digital Lab.
EC2203 Digital Electronics
AP9212 Advanced Digital System Design
EC2207 Digital Electronics Lab
EC2251 Electronic Circuits- II
EC2304 Microprocessor and Microcontrollers
EC2035 Cryptography and Network Security
EC1264 Electronics and Microprocessor
GE2151 Basic Electrical and Electronics Engineering
EC2257 Electronic Circuits-II and Simulation Lab
EC1405 Optical and Microwave lab
EC2308 Microprocessor and Microcontrollers Lab
GE2116 Engineering practices lab
EC2357 VLSI Design lab
EC2258 Linear Integrated Circuits Lab
EC1265 Electronics and Microprocessor Lab
EC2155 Circuits and Devices Lab
AP7102 Advanced Digital Logic System Design
AP7111 Electronics System Design Laboratory I
MV2309 Electrical Engineering Electronics and Micropocessor Laboratory
Co-Principal Investigator for the project titled “Design and Development of Key exchange mechanism for high-security Applications” received Rs.13.32 Lakhs from ISRO under REsPOND scheme for period of 2 years from 2017-2019.
M. Athappan, K.Swetha, “Design and Analysis of Carry Select Adder Using Kogge Stone Adder” in the International Journal of Innovative Research in Computer and Communication Engineering, Vol.5, Special Issue 3, April 2017./
M.Athappan, C.T.Poomagal,”Wireless Optical Communication for Underwater Applications”, International Journal of Advanced Research in Electronics & Communication Engineering Vol.3, Issue 3, March 2014.
M.Athappan, G.Madhusudhanan,”VLSI based performance improvement in Digital Hearing aid using reconfigrable filter”, International Journal of Engineering Research & Technology,Vol.3, Issue 5, May 2014.
Vimala R V and Athappan M, “Area and Power Efficient Common Boolean Logic Based Carry Select Adder using Optimized Carry Select Method” in the Second international Conference on Human Computer Interactions ICHCI-2016 held on 10th and 11th March 2016 at Saveetha School of Engineering,Chennai.
Presented a paper titled “Area- Delay Tradeoff Optimization for Memory Based Computation” in Fourth International Conference on Electronics Computer Technology(ICECT 2012)held during 6th to 8th April 2012,in Kanyakumari,India.
Participated in One Day Seminar on “Tanner EDA Seminar: Upgrade to Custom ASIC 2018” held on 24th April 2018 at Hyatt Regency, Chennai.
Participated in three Days Workshop on “Real Time Signal Acquisition and Processing using MATLAB and LabVIEW” held on 18th -20th September 2017 at B.S.Abdur Rahman Crescent University, Chennai.
Participated in one Day IEEE authorship Workshop on “How to Publish a Technical Paper with IEEE” held on 20th August 2015 at IIT Madras, Chennai.
Participated in One Day Workshop on “Research Methodology” held on 15th December 2014 at Anna University, Chennai.
Participated in Three Days Workshop on “Emerging Technologies in Telecommunication” held on 6-8th January 2011 at SVCE, Chennai.
Participated in Two Days “National Workshop on VLSI Systems” held on 13th and 14th March 2009 at SVCE, Chennai.
Participated in Two Days Workshop on “Overview of VLSI CAD Tools” held on 17th and 18th August 2007 at NIT, Tiruchirapalli.
Participated in Three Days training Programme on “Instructional Design and Delivery” held on 4th to 6th January 2007 at SVCE, Chennai.
Participated in Two Weeks AICTE sponsored “Staff Development Programme” held during 28.04.2003 to 11.05.2003 at R.V.S College of Engineering and Technology, Dindigul.
Co-ordinator for the “Two days Workshop on FPGA Based System Design for Image Processing Algorithms” organized by Research and Development Cell, Department of Electronics and Communication Engineering, SVCE on 1st & 2nd February 2017.
Co-ordinator for the “Two days Workshop on Analog Custom IC Design using Cadence EDA” organized by Research and Development Cell, Department of Electronics and Communication Engineering, SVCE on 19th & 20th August 2016.
Co-ordinator for the “Recent Trends in Embedded Systems” organized by Research and Development Cell, Department of Electronics and Communication Engineering, SVCE on 10th & 11th March 2016.
Applied Electronics Lab In-charge,
University Theory Examination Invigilation,
Vacation roster, IIC Institution Member